Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, medical, automobile, and other applications. The technology used to manufacture image sensors, and in particular CMOS image sensors, has continued to advance at great pace. For example, the demands of higher resolution and lower power consumption have encouraged the further miniaturization and integration of the image sensor.
As the pixels become smaller, the surface area that can receive incident light is also reduced. The pixel typically has a light-sensing element, such as a photodiode, which receives incident light and produces a signal in relation to the amount of incident light. Thus, as the pixel area (and thus the photodiode area) decreases, the well capacity of the photodiode also becomes smaller.
One prior art structure of a photodiode that has enhanced well capacity comprises a shallow N− layer in a P-type region or substrate. A P+ pinning layer is then formed over the shallow N− layer. This structure is known as a pinned photodiode and has relatively high well capacity, but sometimes at the expense of “dark current” performance and excess “hot pixel” defects. Moreover, by substituting a deeper N− layer for the shallow N− layer, a lower hot pixel defect density can be achieved, but this will also result in a lower well capacity that in turn limits signal to noise ratio performance.
The present invention is directed towards a photodiode and pixel design that has high well capacity and with limited dark noise and hot pixel defect density.